Tunnel junctions in a III–V nanowire by surface engineering
S. Nadar, C. Rolland, J.-F. Lampin, X. Wallart, P. Caroff, and R. Leturcq
Nano Research, vol. 8, no. 3, pp 980-989, 2015
We demonstrate a simple way of fabricating high performance tunnel devices from p-doped InAs nanowires by tailoring the n-doped surface accumulation layer inherent to InAs surfaces. By using appropriate ammonium sulfide based surface passivation before metallization without any further thermal treatment, we demonstrate characteristics of tunnel p-n junctions, namely Esaki and backward diodes, with figures of merit better than previously published for InAs homojunctions. The further optimization of both the surface doping, in a quantitative way, and the device geometry allows us to demonstrate that these nanowire-based technologically-simple diodes have promising direct current characteristics for integrated high frequency detection or generation.